Four-quadrant multiplication with the AD7520 in bipolar operation. The Intersil AD7520 is an 18-pin multiplying D/A converter. A logic one input at any digital input forces the corresponding ladder switch to steer the bit current to the IOUT1 bus. A logic zero input forces the bit current to the IOUT2 bus. For any code the IOUT1 and IOUT2 bus currents are complements of one another. The current amplifier at IOUT2 changes the polarity of IOUT2 current and the transconductance amplifier at lour output sums the two currents. This configuration doubles the output range but halves the resolution of the D/A convener. For the offset adjustment set VREF to approximately +10 volts and connect all digital inputs to logic one. Adjust the IOUT2 amplifier offset zero pot for 0V ±1 mV at IOUT2 amplifier output. Connect the MSB to logic one and all other bits to logic zero. Adjust IOUT1 offset zero pot for 0V ±mV at VOUT. For the gain adjustment connect all digital inputs, to VDD. Monitor VOUT for a -VREF (1- 2- (n - 1)) volt reading, where n is equal to 10. To increase VOUT connect a series resistor, 0 to 500 ohms, in the lour amplifier feedback loop. To decrease VOUT connect a series resistor, 0 to 500 ohms, between the reference voltage and pin 15 (courtesy Intersil, Inc.).
The AD7520/AD7530 and AD7521/AD7531 are monolithic, high accuracy, low cost 10-bit and 12-bit resolution, multiplying digital-to-analog converters (DAC). Intersil' thin-film on CMOS processing gives up to 10-bit accuracy with TTL/CMOS compatible operation. Digital nputs are fully protected against static discharge by diodes to ground and positive supply.
Typical applications include digital/analog interfacing, multiplication and division, programmable power supplies, CRT character generation, digitally controlled gain circuits, integrators and attenuators, etc.
The AD7530 and AD7531 are identical to the AD7520 and AD7521, respectively, with the exception of output leakage current and feedthrough specifications.
Supply Voltage (V+ to GND). . . . . . . . . . . . . . . . . . . . . . . . . . . +17V
VREF. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±25V
Digital Input Voltage Range . . . . . . . . . . . . . . . . . . . . . . .V+ to GND
Output Voltage Compliance . . . . . . . . . . . . . . . . . . . . -100mV to V+
Required Field 
